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				How to investigate the specific causes of faults in DC-DC buck converters  
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<p>In electronic systems, current is converted from DC or AC and regulated into a low-voltage power rail for use by electrical loads in the system. In this process, the presence of buck converters is indispensable. They have a wide input voltage range, high efficiency, and compact packaging, which is conducive to meeting the requirements of strict energy efficiency regulations and guarding the last link of low-voltage DC power rail conversion.</p>
<p>Therefore, problems with DC-DC buck converters will directly lead to situations where they cannot be used. But there are many reasons for the failure of DC-DC buck converters, such as switch mode, low voltage, DC-DC, single-phase, non isolated, basic buck converter circuits, etc. So how to troubleshoot? Let me explain in detail nine common problems that may be encountered when designing DC-DC buck converters and some possible reasons.</p>
<p><strong>Problem # 1: Too much ripple</strong></p>
<p>If you see too much ripple, the inductance value may be too low &#8211; higher values will produce lower ripple, but the transient response is slower.</p>
<p>In addition, please remember that a large inductor ripple current means higher peak current and greater likelihood of inductor saturation, especially at high temperatures &#8211; as well as greater pressure on the FET.</p>
<p>Other issues may be that the C out is too low and there is not enough storage space to support output; Or C out ESR (equivalent series resistance) is too high, resulting in IR voltage drop in C out.</p>
<p>Finally, a low switching frequency will result in more ripple.</p>
<p><strong>Problem # 2: Unable to start</strong></p>
<p>Firstly, ask yourself this question: Is the &#8216;enable&#8217; pin correctly driven (or pulled up)? The same goes for good power output.</p>
<p>Startup failure may be due to seeing excessive load capacitance (such as FPGA) acting like a short circuit and triggering current limitation. Some chips have blanking and soft start functions to solve this problem.</p>
<p>Set the current limit point as high as possible to avoid false alarms, and consult with FPGA engineers to optimize the system level capacitance.</p>
<p>Finally, ensure that V in does not sag and that UV locking is not activated due to input pressure drop.</p>
<p><strong>Problem # 3: Inefficient</strong></p>
<p>The bootstrap capacitor needs to be large enough to provide charge to the gate of the high side FET &#8211; otherwise, the FET may not be fully conductive and may burn out the power supply. The resistor connected in series with the boost pin can be used to adjust the turn-on to control ringing.</p>
<p>Measuring power circuit efficiency (especially above 90%) is not an easy task as it requires current measurement and is the ratio of two power quantities. Hope you have described the contribution of each component to losses through a spreadsheet tool, which typically tells you that MOSFETs and inductor resistors (&#8220;DCR&#8221; or DC resistors) are the main sources of wasted heat.</p>
<p>undefined</p>
<p>Display the efficiency frequency relationship diagram of the buck switching regulator. The plot is taken from the LT8610 data sheet of Linear Tech/Analog Devices.</p>
<p><strong>Problem # 4: There is voltage at the output terminal when it is turned off</strong></p>
<p>If your circuit is indeed turned off but you see voltage at the output, it usually comes from another power circuit. Detected non obvious paths of other activity tracks.</p>
<p><strong>Question # 5: Unstable</strong></p>
<p>C out ESR may be the reason for instability, as it introduces zero in the loop response, which causes the gain curve to stop decreasing and begin to shift laterally, eroding or eliminating the gain margin. If the zero frequency is low enough, the gain will not exceed zero before the phase reaches 180 °.</p>
<p>Cheaper converter chips may have internal compensation to save external parts, but please ensure that your C output meets their stable minimum and maximum C output ESR ranges.</p>
<p>Other explanations for instability may include poor voltage detection or summation node layout or noise.</p>
<p>Please make sure to use design software to generate Bode plots and check phase and gain margins, including over temperature conditions.</p>
<p><strong>Problem # 6: Improper regulation</strong></p>
<p>For remote V out sensing, the Ohmic voltage drop in the power path may cause poor regulation, which may be due to the power rail (single power converter output line) being allocated too much load on the circuit board. That&#8217;s why sometimes multi rail converter ICs (PMICs) are avoided to support multiple converters next to the load.</p>
<p>If your voltage detection pin has noise, please keep the layout of the pin neat and ensure that any resistors related to the detection signal are placed near the controller.</p>
<p>Another explanation is that your reference voltage may be unstable when there is insufficient filtering.</p>
<p><strong>Problem # 7: Slow transient response</strong></p>
<p>The culprit here may be too many high-capacity output capacitors or too large inductors.</p>
<p>Another issue may be poor loop compensation. Without suitable equipment, it is difficult to fully characterize the loop characteristics. However, even if you don&#8217;t have a network analyzer, you can still use a step load and observe transient ringing &#8211; it will tell you a lot of cheap things.</p>
<p>In addition, during the development process, if the design load changes, compensation usually must also change. For example, do you use a factory evaluation module at half of its designed load? You see the problem.</p>
<p><strong>Question # 8: Low temperature issue</strong></p>
<p>Please remember that the ESR of electrolytic capacitors will increase and the capacitance will decrease at low temperatures.</p>
<p><strong>Question # 9: PMBus issue</strong></p>
<p>On the shared data communication bus, ensure that another node does not intermittently shake when you are not paying attention.</p>
<p>Additionally, please ensure that the pull-up resistor you are using is strong enough: a 47k Ω pull-up resistor (such as FPGA) is not as good as a 10k Ω one.</p>
<p>It is not difficult to see from the above that when troubleshooting, it is important to consider which variables are at work and reduce the number of possible causes of the fault. Considering these concepts before starting the investigation can provide a clearer understanding, reduce the possibility of trial and error, and save more time.</p>
<p><strong>Here are some guidelines that can help you:</strong></p>
<p>1. You need to reliably prevent the system from troubleshooting it. A problem that disappears on its own will come back on its own.</p>
<p>2. Change only one thing at a time and pay attention to the effect.</p>
<p>If the circuit stops working, ask &#8216;What changes have occurred?&#8217; Is there an event that occurred simultaneously with the failure?</p>
<p>4. Check if the fault moves with the conversion board or load.</p>
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